发明名称 |
DATA SYNCHRONIZATION DETECTION METHOD |
摘要 |
PURPOSE:To detect a preamble early in digital communication by comparing preceding and the newest coding data latched so as to detect the presence of autocorrelation of a reception signal. CONSTITUTION:A timing when a reception signal g2 is fetched by a CPU 3 is controlled by an interruption interval control means 4 connected to an interruption control terminal and two kinds of synchronizing interruption intervals are set to the interruption interval control means 4. In this case, a period of a sampling clock period t1 is a period dividing a time required for representing one symbol into 1/12. A reception preamble signal is binary-sampled at a period resulting from dividing a time slot of the preamble signal into 1/12. Then the preamble signal subjected to binary sampling is coded for each 8-bit and the arrival of the preamble signal is detected based on the autocorrelation of a code string of the preamble signal coded for each 8-bit. |
申请公布号 |
JPH05103023(A) |
申请公布日期 |
1993.04.23 |
申请号 |
JP19910263470 |
申请日期 |
1991.10.11 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
TAMURA HIDEJI;MATSUBARA NAOKI;INOUE MITSUGI |
分类号 |
H04L7/10;H04L27/14 |
主分类号 |
H04L7/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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