发明名称 BATTERY BACKUP CIRCUIT
摘要 PURPOSE:To surely protect the storage contents by releasing a write inhibition of a backup RAM for a period in which a prescribed bit pattern is outputted, and inhibiting an output of a bit pattern in the case abnormality is detected in a CPU. CONSTITUTION:A digital comparator 21 checks whether a pattern of an output signal of 8-bit width outputted from an output port 20 coincides with a prescribed pattern determined in advance or not, and when they coincide with each other and when they do not coincide, an outputted noncoincidence detection signal is set to an L level and an H level, respectively. In such a state, a CPU 1 releases a write inhibition signal at the moment when data is written in a backup RAM 4, and sets the write inhibition signal to an inhibition state again when write is completed. Also, even if the CPU 1 under runaway outputs accidentally a bit pattern to an output port, the noncoincidence detection signal of the digital comparator 21 remains at an L level as it is, and the backup RAM 4 is not released from a write inhibition state.
申请公布号 JPH05100964(A) 申请公布日期 1993.04.23
申请号 JP19910285457 申请日期 1991.10.07
申请人 MITSUBISHI ELECTRIC CORP 发明人 FURUKUBO YUJI
分类号 G06F12/16 主分类号 G06F12/16
代理机构 代理人
主权项
地址