VERMINDERUNG DES RAUSCHENS WAEHREND DES PRUEFENS VON INTEGRIERTEN SCHALTUNGSCHIPS.

摘要

A test system having improved means for reducing driver switching (delta I) noise. The test system employs a tester connected to and electrically testing an integrated circuit device, such as a logic chip. The integrated circuit device has a plurality of input terminals (R5-R54) for receiving an electrical test pattern from the tester. The integrated circuit device also includes a plurality of output driver circuits (D2-D1O2) having outputs connected to the tester. The test system is characterized in that said integrated circuit device includes a driver sequencing circuit (L1-L1O) responsive to at least one control signal (R1-R4) from said tester to sequentially condition said driver circuits for possible switching, whereby delta I noise is reduced during testing.