发明名称 Method of manufacturing electrical interconnections in semiconductor devices.
摘要 <p>Openings for contact holes, grooves, and through-holes are (38,39) formed in an insulating BPSG film (37) formed on a semiconductor substrate (36) including electrical circuit elements. Next, a conductive material (41) such as Al alloy is deposited over the entire substrate by sputtering technique, and then the insulating film is selectively removed from the substrate except for the regions at and near the openings.Thereafter, the Al alloy is caused to re -flow into the corresponding openings by means of laser light to form desired lead lines (30,31,33) in the openings (38,39). &lt;IMAGE&gt;</p>
申请公布号 EP0537749(A1) 申请公布日期 1993.04.21
申请号 EP19920117645 申请日期 1992.10.15
申请人 NEC CORPORATION 发明人 UENO, HISASHI
分类号 H01L21/28;H01L21/3205;H01L21/768 主分类号 H01L21/28
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