发明名称 Nand-cell type electrically erasable and programmable read- only memory with redundancy circuit.
摘要 <p>A NAND-cell type electrically erasable and programmable read only memory (20) includes an array (21) of rows and columns of memory cells associated with parallel bit lines on a semiconductive substrate. Each memory cell essentially consists of a floating-gate field effect transistor having a floating gate and an insulated control gate. The memory cell array (21) is divided into a plurality of cell blocks, each of which includes NAND cell sections each including a predetermined number of a series-connected memory cell transistors. A redundancy cell section is provided which includes an array of redundancy memory cells containing at least one spare cell block. A row redundancy circuit (29) is connected to a row decoder (22), and is responsive to an address buffer (28). The redundancy circuit (30) replaces a defective block containing a defective memory cell or cells with the spare cell block. <IMAGE></p>
申请公布号 EP0537973(A2) 申请公布日期 1993.04.21
申请号 EP19920309295 申请日期 1992.10.13
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 TANAKA, YOSHIYUKI;ITOH, YASUO;MOMODOMI, MASAKI;IWATA, YOSHIHISA;TANAKA, TOMOHARU
分类号 G11C17/00;G11C16/04;G11C16/06;G11C29/00;G11C29/04 主分类号 G11C17/00
代理机构 代理人
主权项
地址