STATIC VOLTAGE INVERTER BASE SIGNAL GENERATING CIRCUIT

摘要

counter circuits (1-4) for counting as much as a fixed number to designate the ROM input addresses; an EPROM (5) outputting the determined inverter base signal wave responding to the inputted program to the buffer circuit through databus; a circuit (7) for generating the reset signal; a buffer circuit (6), which includes an output enable block circuit, synchronizing the generated base signal to the oscillating frequency of counter. The circuit can change the frequency, the phase difference and the ON delay time by program of EPROM.