发明名称 |
Electronically-erasable programmable read-only memory - has selection transistor in semiconductor substrate between 2 memory transistors |
摘要 |
The memory has a pair of memory transistors (43, 44) provided in the surface of a semiconductor substrate (20) so that they are spaced by an intermediate zone, each transistor (43, 44) having a floating gate (14a, 14b) for storing information charges and a control gate (7a, 7b) for controlling the floating gate (14a, 14b). The intermediate zone contains a selection transistor (3) for the 2 memory transistors (43, 44). Pref. the selection transistor (3) has a gate electrode (4) part of which overlaps the 2 memory transistors (43, 44) via an intermediate insulation film (47) extending over the control gate (7a, 7b) of each memory transistor (43, 44). ADVANTAGE - Allows high density integration.
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申请公布号 |
DE4233790(A1) |
申请公布日期 |
1993.04.15 |
申请号 |
DE19924233790 |
申请日期 |
1992.10.07 |
申请人 |
MITSUBISHI DENKI K.K., TOKIO/TOKYO, JP |
发明人 |
NAKAJIMA, MORIYOSHI, ITAMI, HYOGO, JP |
分类号 |
H01L21/336;H01L21/8247;H01L27/115;H01L29/788;H01L29/792 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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