STRUCTURE FOR SUPPRESSION OF FIELD INVERSION CAUSED BY CHARGE BUILD-UP IN THE DIELECTRIC

摘要

The invention relates to an integrated circuit including one or more amorphous silicon layers (14, 14a, 15, 15a) for neutralizing charges which occur in various dielectric layers (6) during fabrication. The amorphous silicon layers include dangling silicon bonds which neutralize charges which would otherwise cause isolation breakdown, impair integrated circuit performance and increase manufacturing costs.