ZEITUEBERWACHUNGSSCHALTUNG GEEIGNET FUER GEBRAUCH IN MIKRORECHNER.

摘要

A watchdog timer circuit employed in a microcomputer is disclosed. The watchdog timer circuit detects the occurrence of a program abnormal termination or an infinite loop operation and includes a capacitor, a charging circuit charging the capacitor when a predetermined instruction is executed, a discharging circuit discharging the capacitor when other instructions are executed, a detection circuit detecting the voltage across the capacitor and producing a detection signal when the voltage across the capacitor becomes smaller than a reference voltage, and a reset circuit resets the microcomputer to its initial state in response to an abnormal detection circuit. When the program termination or an infinite loop operation occurs, the predetermined instruction is not executed for a long period of time. The capacitor continues to be discharged. As a result, the detection signal is produced. The microcomputer is thereby reset to its initial state.