EVEN PARRITY CALCULATOR

摘要

The calculator for calculating the B1 byte of the synchronous transport module-1 (STM-1) grade which is the base level of the synchronous digital hierachy (SDH) system uses an even parity to calculate the bit interleaved parity-8 (BIP-1) so that the STM-1 frame is processed at 1/8 speed (19.44 Mbps) of the 155.52 Mbps which is the line communication speed. The calculator comprises an even parity processor (11) calculating the BIP with the even parity, frame data, and simultaneous latch signal; a first latch (12) providing the calculated output of the BIP synchronised at 19.44 Mbps clock pulse; and a third latch (21) providing one calculated BIP out of the simultaneous latch signal, 19.44 Mbps clock pulse, power reset signal, and the output of the first latch.