发明名称 IMAGE SIGNAL HIGH EFFICIENCY ENCODER AND DECODER
摘要 <p>PURPOSE:To improve processing efficiency by detecting intra-frame and odd and even inter-field moving vectors and the added difference of the absolute value of each picture element, selecting an efficient mode from movement compensation and respective block division modes, and controlling a frame memories with movement compensation device. CONSTITUTION:Frame/field movement detection circuits 22 and 21 detects the intra-frame and add and even inter-field moving vectors as well as the added difference of the absolute value of each picture element. A movement prediction mode discrimination circuit 23 and a selector 24 select the efficient mode from among the movement compensation modes in the unit of frame/field. A block division mode discrimination circuit 25 selects the efficient mode from among the respective block division modes for frame/field orthogonal transformation. An address generator 11 controls a frame memory group 10 based on the output of the circuit 25, and a frame memory group 20 with a movement compensation device operates based on the outputs of the circuits 23, 25. Thus, the field or frame processing efficiency can be improved.</p>
申请公布号 JPH0591500(A) 申请公布日期 1993.04.09
申请号 JP19910353990 申请日期 1991.12.19
申请人 SONY CORP 发明人 IGARASHI KATSUJI
分类号 H04N19/107;G06T9/00;H04N5/92;H04N7/00;H04N19/112;H04N19/119;H04N19/12;H04N19/126;H04N19/139;H04N19/159;H04N19/172;H04N19/176;H04N19/186;H04N19/196;H04N19/423;H04N19/46;H04N19/463;H04N19/50;H04N19/503;H04N19/51;H04N19/517;H04N19/53;H04N19/57;H04N19/573;H04N19/577;H04N19/587;H04N19/61;H04N19/625;H04N19/70;H04N19/85;H04N19/91;H04N19/93 主分类号 H04N19/107
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