发明名称 SEMICONDUCTOR-WAFER DICING METHOD
摘要 <p>PURPOSE:To prevent damages of a good chip product and a dicing saw by alternately providing a first cutting line, wherein the starting point of dicing is located at the outside of the periphery of a semiconductor wafer, and a second cutting line, wherein the starting point of dicing is located in the peripheral part of the semiconductor wafer in both longitudinal and lateral dicing directions. CONSTITUTION:In a wafer ring 1, a semiconductor wafer 3 is stuck to the upper surface of a wafer sheet 2. When the wafer ring 1 undergoes dicing with a dicing saw, a first cutting line 4, wherein a dicing starting point is located at the outside of the peripheral part of a semiconductor wafer 3, and a second cutting line 4', wherein a dicing starting point is located in the peripheral part of the semiconductor wafer 3, are alternately provided in both longitudinal and lateral dicing directions. The dicing is performed alternately along the first and second cutting lines 4 and 4'. The dicing is performed in the grid pattern in the longitudinal and lateral directions along the first cutting lines 4 and the second cutting lines 4'. Pure water is jetted dicing part. Formation of rubbish chips is prevented, and the damage caused by the scattering of the rubbish chips is prevented.</p>
申请公布号 JPH0590406(A) 申请公布日期 1993.04.09
申请号 JP19910247946 申请日期 1991.09.26
申请人 NEC CORP 发明人 NAKANISHI FUTOSHI
分类号 H01L21/301;H01L21/78 主分类号 H01L21/301
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