| 摘要 |
PURPOSE:To provide a semiconductor memory in which storage can be stably held irrespective of lapse of a time. CONSTITUTION:Data lines (YN, YN-1...) 6 are respectively connected to the drains of P-channel transistors 3, 4 and 5 connected at sources to a power source VDD, and the outputs of NOR gates 17, 18, 19 connected at inputs to the data lines (YN, YN-1...) 6 are fed back to the gates of the transistors 3, 4 and 5. A precharge signal 1 is connected to the other inputs of the NOR gates 17, 18 and 19. Holding circuits of the gates 17, 18 and 19 are provided at the data line to latch a high potential precharged by the signal 1 to the data line (YN, YN-1...) 6, and can be stably held irrespective of lapse of time. |
