发明名称 TEST METOD OCH TEST APPARAT
摘要 The invention concerns a test method and test apparatus for detection and localization of manufacturing defects in an electronic arrangement that contains test structures according to standard IEEE 1149.1, hereafter "the tested arrangement" by means of selected current diagnosis. The selected current diagnosis significantly broadens the area of application of wiring tests according to standard IEEE 1149.1 (JTAG) on component boards that contain both components with standardized test structures and traditional components without the standardized test structure. Broadening of the area of application and the increased coverage of wiring tests are based on measurement of changes in the value of the operating current that an arrangement takes from a power source by means of a computer-control test arrangement that contains a current measurement device and a control device for the test structures, when the test arrangement by means of the standardized test structure placed in the test arrangement has guided the test arrangement into a desired controlled static state or states. <IMAGE>
申请公布号 FI914733(A) 申请公布日期 1993.04.09
申请号 FI19910004733 申请日期 1991.10.08
申请人 WEISSENFELT, MATTI;OLKKOLA, HANNU;TIENSYRJAE, KARI 发明人 WEISSENFELT, MATTI;OLKKOLA, HANNU
分类号 G01R;G01R31/28 主分类号 G01R
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