| 摘要 |
PURPOSE:To provide a bus diagnostic system capable of easily specifying an abnormal position in an internal bus by repeatedly checking test data via respective bus repeater circuits at the time of generating abnormality between modules. CONSTITUTION:Modules 11 to 14 for individually executing data processing forms a bus test message consisting of test data, a module address, etc., and sends the message to a bus. An error in test data included in the bus test message returned by the bus repeaters 15A, 15B is detected and bus abnormality is informed to the outside. The bus repeater 15A, 15B judge an address in the bus test message and send selection signals to bidirectional interface circuits 17A to 17D. The circuits 17A to 17D separate unbalanced buses 19A to 19D from balanced buses 20A, 20B based upon the selection signals obtained from bus test judging circuits 18A, 18B and return the buses. The internal bus is tested and an abnormal position is specified. |
