发明名称 PACKET TRANSFER SYSTEM
摘要 PURPOSE:To avoid ineffective data transfer and to improve the use efficiency of a bus by immediately reporting withdrawal of a data transmission request in the case that a transmission destination packet transmission/reception circuit cannot receive data at the time of generation of the data transmission request. CONSTITUTION:When the request to transmit packet data in a packet buffer 12 to a packet transmission/reception circuit 11n is generated in a packet transmission/reception circuit 111, a transfer control circuit 13 indicates address 'N' of the circuit 11n to the first time slot out of time slots 31 multiplexed with respect to time on a bus request line 23, A bus contention arbitrating circuit 25 always monitors the request line 23 and detects the transfer request from the circuit 111 to the circuit 11n by this address indication. Since it is recognized that the circuit 11n cannot receive data, the circuit 25 immediately indicates 'destination reception. buffer busy' to the first time slot on a bus request response line 22 as the response. Thus, ineffective data transfer is avoided, and the use efficiency of the bus is improved.
申请公布号 JPH0583297(A) 申请公布日期 1993.04.02
申请号 JP19910245330 申请日期 1991.09.25
申请人 NEC CORP 发明人 ISHIZUKA TOSHIO
分类号 H04L12/56 主分类号 H04L12/56
代理机构 代理人
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