发明名称 ARITHMETIC PROCESSING CIRCUIT
摘要 PURPOSE:To provide an arithmetic processing circuit which can perform its processing at a high speed in a simple constitution by providing a storing means, an adder means and a selector means. CONSTITUTION:A storing means 4 is provided to previously store the rounding data needed for the rounding processing of the data of a prescribed number of bits together with an adder means 1 which adds the correction value data obtained from the data stored in the means 4 to the data of a prescribed number of bits, and a selector means 3 which extracts the data of an optional number of bits out of the data added by the means 1. Furthermore the means 4 stores previously the offset data needed for the offset designation of the data of a prescribed number of bits. Then the means 1 adds the correction value data obtained from the offset data stored in the means 4 to the data of a prescribed number of bits. In such a constitution, a memory which stores the correction value data is not needed and the arithmetic processing is carried out at a high speed in a simple constitution.
申请公布号 JPH0580978(A) 申请公布日期 1993.04.02
申请号 JP19910238428 申请日期 1991.09.18
申请人 FUJITSU LTD 发明人 MATSUI SATOSHI
分类号 G06F7/38 主分类号 G06F7/38
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