发明名称 AMPLITUDE LIMITING*AMPLIFYING CIRCUIT
摘要 PURPOSE:To reduce not only the higher harmonic strain but the fluctuation of gain and then eliminate the increase the output delaying time, by securing a negative feedback to the first stage for the output of the final stage of the amplifying circuit in which the N sets of a pair of circuits comprising the amplitude limiters connected to the output of the amplifiers are connected longitudinally. CONSTITUTION:The amplitude limiter B1 consisting of the diodes D1 and D2 is connected between the output of the amplifier A1 and the input of the amplifier A2. The limiter B1 gives a limitation to the output amplitude of the amplifier A1 to avoid occurrence of the saturation to the output, and then applies the output received an amplitude limitation to the input of the amplifier A2 to avoid occurrence of the saturation to the output of A2 as well as avoid the increase of the output delaying time. Furthermore, the output of the amplifying circuit consisting of the longitudinal connection between the amplifiers A1/A2 and the limiters B1/B2 is fed back to the input of the amplifying circuit by the feedback circuit comprising the resistances R1 and R2. As a result, the higher harmonic strain or the fluctuation of gain caused at the limiters B1 and B2 an be reduced sufficiently at the output terminal 2.
申请公布号 JPS5635519(A) 申请公布日期 1981.04.08
申请号 JP19790111497 申请日期 1979.08.30
申请人 NIPPON ELECTRIC CO 发明人 KAWAYAUCHI NOBORU
分类号 H03G11/02;H03G11/00;(IPC1-7):03G11/00 主分类号 H03G11/02
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