| 摘要 |
PURPOSE:To reduce the capacity of a memory and to reduce the amount of transfer so as to reduce the amount of hardware and improve transfer time by generating a clock event in data transfer for one period. CONSTITUTION:The memory 9 storing time data and clock event data including a clock period, a first addition circuit (adder) 5 adding the clock period in clock event data and updating the clock period at every processing, and a second addition circuit (adder) 6 adding an addition result by the first addition circuit 5 and time data in clock event data are provided. Clock event generation time is calculated in the addition processing of the second addition circuit 6 and therefore the clock event is generated. Thus, the clock event is generated by data transfer for one period. Thus, the capacity of the memory and the amount of transfer can be reduced. Then, the amount of hardware can be reduced and transfer time can be improved. |
