| 摘要 |
PURPOSE:To make it possible to obtain an output in a high speed with a high sensitivity, by combining respective signals of the first and second systems. CONSTITUTION:Signal charge of two-system CCD registers are flowed to output diodes D1 and D2 having read parts B1 and B2 through the part right under output gate OG. Signal charge of the first system is reset by the reset voltage applied to MOSTQR1 for reset; and when this reset voltage becomes low-level, it is detected by the first amplifier 1A and appears at output terminal P1 of the amplifier as output V01. Similarly, signal charge of the second system appears at output terminal P1 of amplifier 1B as output V02. These outputs are subjected to sampling hold and are led to output terminal 0 through source follower amplifier 2. |
