发明名称 PHASE LOCKED LOOP OSCILLATOR CIRCUIT AND PHASE COMPARATOR
摘要 PURPOSE:To provide the phase locked loop oscillator circuit in which phase comparison is implemented by using a sole phase comparator whose phase frequency demodulation sensitivity is changed in both phase locking state and phase unlocking state. CONSTITUTION:A phase frequency difference detection circuit 31 of a phase comparator 3 receives a reference signal (b) and a comparison signal (a) from terminals R, V and outputs a detection signal whose H level duty is always the unity to a detection output terminal D and outputs a detection signal whose H level duty is decreasing as a phase difference between the two input signals a, b is increasing to a detection output terminal U. Sampling circuits 32, 33 are connected respectively to the detection output terminals U, D, from which the output signal is outputted while the H level duty is decreased when the H level duty of the input detection signal is set between 1 and 0. A differential amplifier circuit 34 receives outputs of the sampling circuits 32, 33 differentially and integrates them to obtain a phase frequency difference demodulation signal. The phase comparator 3 is used for the phase locked loop oscillation circuit and a phase shift quantity of a phase shifter 322 is controlled from a signal at a phase shift control terminal 323 in response to the synchronization state signal of the voltage controlled oscillator.
申请公布号 JPH0575452(A) 申请公布日期 1993.03.26
申请号 JP19910232625 申请日期 1991.09.12
申请人 NEC CORP 发明人 KOBAYASHI YUKIO
分类号 H03L7/095;H03L7/089;H03L7/091;H03L7/107 主分类号 H03L7/095
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