发明名称 MEMORY DIAGNOSTIC SYSTEM
摘要 <p>PURPOSE:To shorten the memory diagnostic time in which a parallel operation with a program is enabled by executing an operation for writing data in all cells of a memory by an external circuit. CONSTITUTION:After a power source is turned on, multiplexers 9, 10 and 11 receive an address, data and a write pulse inputted to a memory 5, from a data output circuit 2, an address generating circuit 5 and a write pulse generating circuit 6, and execute a write operation to all cells of a memory 5. When write is finished, the multiplexers 9, 10 and 11 execute switching so as to supply the address, the data and the write pulse supplied to the memory 5, from a processor 1.</p>
申请公布号 JPH0573429(A) 申请公布日期 1993.03.26
申请号 JP19900400308 申请日期 1990.12.04
申请人 NEC CORP 发明人 HARA TAKAO
分类号 G06F12/16 主分类号 G06F12/16
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