INDUCTIVE STRUCTURES FOR SEMICONDUCTOR INTEGRATED CIRCUITS

摘要

Inductive structures having low parasitic capacitances for direct integration in semiconductor integrated circuits. In one embodiment, a generally planar spiral winding (2) is disposed on the surface of a substrate (1). An electrical connection to the internal end (4) of the spiral (2) is made through electrically conducting vias (21,23) passing through the substrate (1). The spiral (2) may be spaced from a substrate surface by a plurality of spaced apart electrically conductive posts (25) having a staggered arrangement between adjacent windings of the spiral (2). A transformer includes two windings disposed on top of each other on a semiconductor substrate (1) and separated by an electrically insulating film (33). The windings have a common central opening in which a magnetic material (36) is disposed to improve the inductive coupling between the windings. The transformer may include two helical windings (47,48), one surrounding another, each formed with vias (51,56) and electrical conductors (52,53;57,58) the inner winding (47) being formed in and on a semiconductor substrate (1) and the outer winding (48) being formed on insulating films (41,42) disposed on the substrate (1) and extending through the films (41,42) and substrate (1). A variable inductor includes inductively coupled spiral windings (62,2) separated by an insulating film (61) and a current control (68) for controlling the current through one of the spirals and, thereby, the effective inductance of the other spiral.