High speed digital clock synchronizer

摘要

A synchronization system for locking a data input signal to a local clock uses the data input signal to provide the timing for capturing phase waveforms generated by a delay element string and a local oscillator. A transition detector generates bit patterns which correspond to a captured phase waveform which is in synch with the data input signal. The bit pattern of the captured in synch waveform is stored in a storage device under control of window detection and control logic also timed by the data input signal. The control logic stores a new bit pattern of a new phase waveform when the window detection logic determines that the new bit pattern is outside a 2-bit window and then selects the new phase waveform correponding to the new bit pattern for clocking the data input signal if the new bit pattern hasn't changed after N consecutive cycles of the data input signal.