| 发明名称 |
Method of manufacturing InP junction FETS and junction HEMTS using dual implantation and double nitride layers |
| 摘要 |
A new planar, fully ion-implanted indium phosphide junction FET (JFET) fabrication process, utilizing n+ source-drain implantation, Be and Be/P p+ gate implantation, and nitride-registered gate metallization.
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| 申请公布号 |
US5196358(A) |
申请公布日期 |
1993.03.23 |
| 申请号 |
US19890459155 |
申请日期 |
1989.12.29 |
| 申请人 |
THE UNITED STATES OF AMERICA AS REPRESENTED BY THE SECRETARY OF THE NAVY |
发明人 |
BOOS, JOHN B. |
| 分类号 |
H01L21/285;H01L21/335;H01L21/337 |
主分类号 |
H01L21/285 |
| 代理机构 |
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