| 摘要 |
First and second outputs of a differential amplifier stage are coupled via first and second selectively enabled transmission gates to first and second inputs of a selectively enabled complementary flip-flop. During a data sensing and acquisition phase, the transmission gates are enabled and the flip-flop is disabled. Although the flip-flop is disabled, two of its cross coupled transistors are coupled via the transmission gates to the differential amplifier stage. This enhances the setting of the flip-flop when it is subsequently enabled and the transmission gates are disabled.
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