| 摘要 |
The method comprises (a) forming field oxide on the substrate, (b) depositing buffer oxide and poly into which N+ ions are implanted, (c) etching it using N+ S/D region as a mask, (d) depositing poly into which ions are not implanted and etching it vertically to form side walls, (e) depositing gate oxide, (f) depositing gate poly between N+ S/D regions, on which side walls are formed, to form T-type gate, (f) forming oxide for cap gate, (g) forming contact region with depression layer on N+ S/D region, (h) forming storage node poly, dielectric layer and plate poly thereon, (i) depositing oxide and doped on the plate poly and flowing, (j) forming bit line on N+ S/D region and depositing metal.
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