| 摘要 |
<p>PURPOSE:To reduce gate capacitance easy to be manufactured and suitable for high integration. CONSTITUTION:A plurality of zonal cold cathode substrate electrodes 25 consisting of a P (phosphor)-doped n-type resistance layer are mutually in parallel formed on the surface of a non-doped Si substrate 24 which is a high- resistance semiconductor. A plurality of electric field emission type cold cathodes 21 having a wedge-shaped side section are formed in a linear array shape on the respective zonal cold substrate electrodes 25 in order to enlarge a surface area. On the surface of the non-doped Si substrate 24, a gate electrode 22 is formed excepting long holes including a region where an electric field emission type cold cathode 21 is located while interposing an insulating layer at the height nearly on the same level with the height of the electric field emission type cold cathode 21.</p> |
