发明名称 INPUT SWITCHING PLL
摘要 PURPOSE:To prevent a PLL from being pulled in again and to obtain a video signal free from disturbance by turning a phase difference between two signals inputted to a phase comparator to zero after the lapse of one period even when a video signal to be inputted is changed. CONSTITUTION:An inputted video signal is applied to a synchronous separator 2a to separate a horizontal synchronizing signal(SYN) from the current video signal, a video signal outputted from a delay part 1 is inputted to a synchronous separator 2b to extract a horizontal SYN from a video signal obtained one line before. A phase detecting part 3 detects a phase difference between the two horizontal SYNs outputted from the separators 2a, 2b and counts up the number of clocks in the phase difference. Then an adder 4 finds out an added result between the count result and a prescribed reference value and applies the added result to a time converter 5 to convert a time signal. Thereby even when the input of a video signal is switched, a time signal synchronized with the input video signal is always inputted to a phase comparator 6a in a PLL part 6 and the disturbance of an image due to the releading of the PLL part can be prevented.
申请公布号 JPH0568183(A) 申请公布日期 1993.03.19
申请号 JP19910229250 申请日期 1991.09.10
申请人 FUJITSU LTD 发明人 YASUI TETSUYA
分类号 H03L7/06;H04N5/067;H04N5/073 主分类号 H03L7/06
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