| 摘要 |
<p>A frequency synthesizer comprising a phase-locked loop, wherein the phase of a comparison signal based on the output of a voltage controlled oscillator (7) is compared with the phase of a reference signal based on the output of a reference oscillator (1) by a phase comparator (3), and the phase difference signal is passed through a loop filter (50) and is used as a signal for controlling the voltage controlled oscillator. The frequency synthesizer is provided with a preset circuit (60) for changing the output of the voltage controlled oscillator by charging/discharging quickly a capacitor in the loop filter, and a changing circuit (70) for changing the time constant of the loop filter. By decreasing the time constant of the loop filter when the output frequency is changed, the phase-locked loop is phase-locked at a high speed.</p> |
