发明名称 A DYNAMIC ADDRESS TRANSLATION PROCESSING APPARATUS IN A DATA PROCESSING SYSTEM
摘要 In a DAT processing apparatus in a data processing system including a main memory for storing an address conversion table, and a central processing unit for controlling a dynamic address translation DAT operation to convert a virtual address to a real address by referring the address conversion table, the central processing unit includes; a first register for holding the virtual address, a second register for holding a table entry of the address conversion table corresponding to the virtual address held in the first register, a third register for holding the real address of the table entry held in the second register, a comparison circuit for comparing the virtual address held in the first register with the other virtual address to be converted to the real address, and an update unit for converting the contents of the table entry held in the second register, wherein when the virtual address coincides with the other virtual address in the comparison circuit, the table entry converted by the update unit is written into an address of the main memory held in the third register. The invention is preferably used for setting an update bit when the first write to a page is executed. <IMAGE>
申请公布号 AU2204992(A) 申请公布日期 1993.03.18
申请号 AU19920022049 申请日期 1992.09.01
申请人 FUJITSU LIMITED 发明人 HIDEKI SAKATA;TSUTOMU TANAKA;TAKAO KATO;HARUHIKO UENO;AKITOSHI INO;YOSHIHIRO KUSANO
分类号 G06F12/10 主分类号 G06F12/10
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