发明名称 Clamp circuit for clamping video signal including synchronizing signal.
摘要 The clamp circuit of the present invention includes a comparator 9, a pulse signal generating circuit 10, an integrating circuit 12 and a subtractor 17. The comparator 9 compares a composite video signal with a threshold potential and detects a composite synchronizing signal. The pulse signal generating circuit 10 generates pulse signals S1 and S2 showing which of the detected composite synchronizing signal and a reference time period (t) is larger. The integrating circuit 12 corrects a threshold potential in response to the pulse signals S1 and S2 such that the pulse width of the horizontal synchronizing signal of the composite video signal corresponds to the reference time period t. The subtractor 17 subtracts the threshold potential from the composite video signal, so as to fix the DC level of the composite video signal at a prescribed potential. Since a threshold potential which makes constant the pulse width of the synchronizing pulse signals is generated and the video signal is clamped by using this threshold potential, the video signal including the synchronizing signal is made less susceptible to the influence of noise and the like, and clamping operation of the video signal can be done more accurately. <IMAGE>
申请公布号 EP0532354(A1) 申请公布日期 1993.03.17
申请号 EP19920308306 申请日期 1992.09.11
申请人 SHARP KABUSHIKI KAISHA 发明人 HIRAMATSU, YONEJIRO;SAKATSUJI, OSAMU
分类号 H04N5/16;H04N5/10;H04N5/18;H04N5/93 主分类号 H04N5/16
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