Method of functionally testing cache tag RAMs in limited-access processor systems

摘要

A method of functionally testing cache tag RAMs in processor systems where the kernel is typically inaccessible. A test program first determines whether a fault exists at all within the cache tag RAM. If a fault is determined to exist, the faulty RAM location is exercised by sequentially applying patterns of ones and zeros until the pattern of bits actually present at the faulty tag RAM location is determined. A comparison of this pattern of bits with the expected bit pattern provides information as the precise location of the fault so as to permit replacement of defective chips.