发明名称 CLOCK PULSE GENERATING CIRCUIT
摘要 <p>PURPOSE:To apply a clock pulse of a high frequency whose number is constant to a semiconductor device with simple configuration by keeping number of output pulses per unit time constant. CONSTITUTION:A counter 10 is reset by a rising of a pulse inputted from a pulse generator 8 via an input terminal 8a and the count of number of pulses inputted from a high frequency ring oscillator 7 whose frequency is higher than that of the pulse from the pulse generator 8 through an input terminal 7a is started and an output of the counter 10 goes to an H level and a pulse train from the ring oscillator 7 passes through a switch 11 and is outputted from an output terminal 9. When the number of pulses counted by the counter 10 reaches a prescribed number, the output of the counter 10 goes to an L and the output of the pulse train is interrupted. The counter 10 is reset again at a succeeding leading of the pulse from the pulse generator 8 and starts counting.</p>
申请公布号 JPH0563521(A) 申请公布日期 1993.03.12
申请号 JP19910222832 申请日期 1991.09.03
申请人 MITSUBISHI ELECTRIC CORP 发明人 IIO MASAYA
分类号 H03K3/78;G01R31/3183;G06F1/04 主分类号 H03K3/78
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