发明名称 LOGIC GATE CIRCUIT
摘要 PURPOSE:To make it possible to improve output dielectric strength greatly by providing a pulldown transistor. CONSTITUTION:Pulldown transistor TRQ7 is provided. Resistance R7 is connected to the base of TRQ7, the cathode of SBD (Schottky barrier diode) D2 to the collector, and the base of output TRQ3 to the emitter; and the other terminal of resistance R7 is connected to the base of phase dividing stage TRQ2, and the anode of SBD.D2 to the base of off-buffer poststage TRQ6. When either of input terminals 1 is at ''0'', TRQ1 turns on and then TRs Q2, Q3, Q4, and Q7 turn off, so that ''1'' will appear at output terminal 3. When a high voltage is applied to terminal 3 in this state, TRs Q5 and Q6 also turn off and no current flows into the output until the output voltage becomes high enough to break down two emitter junction parts of TRs Q5 and Q6. Thus, even when voltage Vcc of electric power source terminal 2 is 5V, output dielectric strength VOB is not less than 17V and when VCC is OV, VOB is 12V, improving the output dielectric strength greatly.
申请公布号 JPS5642434(A) 申请公布日期 1981.04.20
申请号 JP19790118196 申请日期 1979.09.14
申请人 NIPPON ELECTRIC CO 发明人 MORI SUSUMU
分类号 H03K19/088;(IPC1-7):03K19/088 主分类号 H03K19/088
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