1-Bit token ring arbitration architecture.

摘要

A 1-bit token ring arbitration architecture where a plurality of chips which require access to a shared bus are coupled together in a ring is disclosed. Each chip receives an arbitration in signal from the preceding member of the ring which is used to receive the token. Each chip transmits an arbitration out signal to the following member of the ring to send the token to the following member. In the preferred embodiment, the token appears as a 1 cycle active low pulse. An error signal notifies all the bus participants that a ring error has been detected. Preferably, the number of cycles the error signal is held active, the more severe the error. A request of bus (ROB) signal notifies the chip holding the token that another bus member needs to use the bus. The ROB signal allows the current holder of the token to maintain control of the bus if it has further processing on the bus as long as no other bus member needs the bus. A first timer is called a Token Hold Timer may be included in a ring member which defines how long a the member can hold on to the token after receiving notification on the ROB line that another bus participant wants the bus. A second timer may be included in a ring member to define the maximum time between the release of the token to return of the token by a given processor. It is used as a means to detect whether a lost token condition exists on the ring. <IMAGE>