发明名称
摘要 <p>PURPOSE:To reduce a ROM capacity and to shorten a processing time, by providing a circuit and an instruction which set a mode register value on a ROM directly in a mode register at the time of resetting and instructing the setting of the mode register. CONSTITUTION:The initial value of the mode register 4 is set in advance at a specific address on the ROM3. Next, when a reset signal 101 is outputted from a reset circuit 1, a control signal is outputted from a control signal generation circuit 9, and a PC selection circuit 10 selects a mode register setting PC11, and the PC (program counter) of the mode register setting PC11 is set on a leading address whose initial value is stipulated on the ROM3, and also, a mode transfer circuit 12 is opened, and the mode value of the ROM3 outputted via a bus 102 is transferred to the register 4. According to reset cancel, the mode transfer circuit 12 is closed, and the mode register 4 is set at a readout mode, and the mode is transmitted to a peripheral circuit 5.</p>
申请公布号 JPH0517595(B2) 申请公布日期 1993.03.09
申请号 JP19860295840 申请日期 1986.12.11
申请人 NIPPON DENKI AISHII MAIKON SHISUTEMU KK 发明人 MORIKAWA TAKEHIKO
分类号 G06F15/78;G06F1/24 主分类号 G06F15/78
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