发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To get a semiconductor integrated circuit device wherein the input capacitance is reduced than before by forming an impurity region whose conductivity type is opposite to that of the substrate below a pad. CONSTITUTION:When voltage is applied to the P-N coupling between an n-type substrate 13 and a p-type impurity region 10 different in potential, a depletion layer capacitor is formed. The capacitance between a pad and the n-type substrate 13 is the net the capacitance of the capacitance between the pad 1 and the p-type impurity region 10 both sandwiching a field oxide film and the depletion layer capacitance by the P-N coupling between the n-type substrate 13 and the p-type impurity region 10. At this time, by putting the p-type impurity region 10 in optional condition where the potential is not fixed, the capacitor for between the pad 1 and the n-type substrate 13 is a capacitor structure of direct connection. Accordingly, the input capacitance decreases as compared with before, so the transition time of an input signal can be shortened, and the access time of a semiconductor integrated circuit device can be made high- speed.
申请公布号 JPH0555294(A) 申请公布日期 1993.03.05
申请号 JP19910212092 申请日期 1991.08.23
申请人 SEIKO EPSON CORP 发明人 UEMATSU SATORU
分类号 H01L21/60 主分类号 H01L21/60
代理机构 代理人
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