| 摘要 |
PURPOSE:To minimize an area occupied by a memory cell in a semiconductor device including the memory cell composed of one transistor and one capacitor. CONSTITUTION:A transistor 23, which includes a channel formed vertically thereon, is formed just above a bit line 5, and further a stacked type capacitor 24 is formed just above the transistor 23. A connection portion between the bit line 5 ands the capacitor 24 to source and drain regions 11, 15 of the transistor 23 is arranged vertically and three dimensionally with respect to the principal surface of a semiconductor substrate. Accordingly, capacitance is ensured without causing a difficulty of patlerning on the semiconductor substrate, and an area occupied by a memory call is reduce to facilitate high integration. |
