发明名称 INPUT CIRCUIT
摘要 <p>PURPOSE:To stabilize a logic level of a high power supply potential side by providing a current bias means with a threshold voltage consisting a prescribed transistor located between the P channel transistors of memory cell transistors(TR) which form an input circuit. CONSTITUTION:An input circuit is formed by P channel TR3 and 4 and N channel TR5 and 6 of memory cell TR and an output signal is outputted from an output terminal 9 in accordance with the address signal from an address input terminal 7. Between the TR3 and 4 and the source potential of TR5 and 6, an N type TR10, whose threshold voltage is same as the TR3 and 4, is connected to form a current bias means. And when a power supply potential 1 rises, the current bias means 2-becomes operable, the apparent capability of the P channel TR is reduced, a rise of the logic level is prevented and the logic level of the high power supply potential side is stabilized.</p>
申请公布号 JPH0554686(A) 申请公布日期 1993.03.05
申请号 JP19910212091 申请日期 1991.08.23
申请人 SEIKO EPSON CORP 发明人 UEMATSU AKIRA
分类号 G11C11/413;G11C17/18 主分类号 G11C11/413
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