发明名称 FIXED DECIMAL POINT ARITHMETIC UNIT
摘要 PURPOSE:To effectively carry out the normalization processing by shifting the input data with a barrel shifter by a shift extent detected by a normalization shift extent detecting circuit. CONSTITUTION:A data bus 1 is provided together with an ALU 2, a flag register 3, the output registers 4 and 5, the input registers 6 and 7, a barrel shifter 8, a shift extent setting register 9, a multiplexer 10, a memory 13, and an address register 14. Then a normalization shift extent detecting circuit 11 is added to detect the normalization processing shift extent to the data held by the register 7 together with an exclusive bus 12 which outputs the detected shift extent to the bus 1. In such a constitution, the normalization processing shift extent set to the data held by the register 7 is detected by the circuit 11 and inputted to the shifter 8. Then the shifter 8 carries out the normalization processing.
申请公布号 JPH0553759(A) 申请公布日期 1993.03.05
申请号 JP19910209698 申请日期 1991.08.22
申请人 NEC CORP 发明人 SUNAGA JUNKO
分类号 G06F7/00;G06F5/01;G06F7/76 主分类号 G06F7/00
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