| 摘要 |
PURPOSE:To provide the circuit, which can reduce circuit scale, can reduce energy consumption and a mounting area or the like and further can easily execute a test, concerning various data control systems for delaying data and transforming a format. CONSTITUTION:This circuit is equipped with an address counter 1 to generate a write address controlling the phase of a reference phase pulse according to a test input, address translation circuit 2 to generate a read address adding a prescribed delayed variable to the write address while controlling the phase of the write address according to the test input, and random access memory 3 to read/write a data input according to the addresses outputted from the address counter 1 and the address translation circuit 2, and the delayed variable of the read data can be freely varied. |
