| 摘要 |
<p>PURPOSE: To provide a series comparator adaptive to a series operation characteristic when data are inputted and the number of the data to be compared vary in a data size comparator to discriminate large and small data by comparing inputted data. CONSTITUTION: In the series comparator which decides whether the instruction is to be executed or not to be excuted by comparing a plurality of inputted data in series with internal data values each other, the comparator is provided with NOR gates 11 and 12 which logicize and output each of the two inputted data values DA, DB, by adopting these data and outputs of EX NOR gate 31, inverter IN4, and NAND gate 5 as control values, two latch circuits 40 and 50 which generate output values latched by adopting the output values of NOR gates as input values, a 1st inverter IN5 which reverses output values of the latch circuits respectively and a 2nd inverter IN6, and NOR gate 17 which outputs a constant level value A=B by adopting two output values inverted by the inverter as input values, and is constituted so as to compare the data inputted from the value of the least significant address bit LAB.</p> |
