发明名称 TIMER CIRCUIT INCLUDING AN ANALOG RAMP GENERATOR AND A CMOS COUNTER
摘要 A timer circuit provides a wide range of precise and substantially accurate time intervals. The timer circuit includes a ramp generator circuit having a first input for receiving an input signal to start a ramp signal, a second input for receiving a ramp timing control signal, and an output for providing a ramp signal. A comparator has a first input coupled to the output of the ramp generator, a second input coupled to a reference voltage source, and an output for providing an end ramp signal. A counter circuit has a first input for receiving the end ramp signal to begin counting, a second input for receiving a counter timing control signal, and an output for providing a terminal count signal. The end ramp signal and the terminal count signal are combined in an AND gate to provide a signal that is delayed by a predetermined amount from the input signal. <IMAGE>
申请公布号 EP0507471(A3) 申请公布日期 1993.03.03
申请号 EP19920302358 申请日期 1992.03.19
申请人 TEKTRONIX INC. 发明人 STUEBING, CARLTON;BRADFORD, JEFFREY O.
分类号 G04F5/10;G04F3/00;G04G3/00;H03K5/00;H03K5/13;H03K17/28;(IPC1-7):H03K5/13;H03K5/135;H03K5/05;H03K17/296;H03K4/50 主分类号 G04F5/10
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