| 摘要 |
<p>According to the present invention, there is provided a semiconductor synapse circuit comprising a semiconductor having an electrically charged carrier gas which is provided with a plurality of electrically isolated input channels providing narrowed areas 21 through 24 respectively for restricting the emitting direction of the electrically charged carriers from emitter electrodes 11 through 14 as the exit, gate electrodes 31 through 34 for applying an electrostatic potential for changing the traveling direction of the carriers emitted from the input channels, a single narrowed area 41 positioned opposed to the exits 21 through 24 of the input channels for passing through only the carriers traveling in the restricted direction and an acceptor electrode 40 for collecting the carriers which have passed through the single narrowed area. Since it utilizes the ballistic performance of the carriers, as compared with the conventionally proposed circuit, a synapse circuit whose area is greatly reduced and whose operating speed is improved can be realized. Thus, it becomes possible to further improve the degree of integration and reduce the delay time at the line. <IMAGE></p> |
