| 摘要 |
<p>A novel waveform synthesizer that generates a select output waveform, through simulating the multiplication of the components of the output waveform, is disclosed. One embodiment of this synthesizer is based on the following equation: <MATH> The components U,V of the select output waveform are generated in parallel by at least three different ways. They can be fed in externally or they can be read from pre-stored waveforms in Read-Only-Memories or they can be the outputs of phase accumulators. The components or their trigonometrically transformed versions are then added together or subtracted from each other to generate intermediate waveforms. These intermediate waveforms or their trigonometrically transformed versions are then added together to generate the selected output waveform. Therefore the product of any two waveforms can be generated without the need of multiplying them together. Thus the invention eliminates the need of multipliers in waveform synthesizers. With latches at the outputs of every components in the system, the speed of the system is no longer limited by the speed of multipliers, as in most of the prior arts; instead, it is limited only by the speed of the clock waveform or the speed of the slowest operation, whichever is slower. <IMAGE> <IMAGE></p> |
