发明名称 Method of making vertical PNP transistor
摘要 A vertical PNP transistor for use in an integrated circuit is disclosed. A P-type substrate serves as collector. An N-type epitaxial layer is formed on the substrate and serves as base. A P-type region is formed in the epitaxial layer and serves as emitter. An N+-type localized buried layer is formed on the substrate in the area beneath the emitter. The localized buried layer covers less than all of the area under the emitter. An N+-type sinker region is formed through the epitaxial layer, connecting to the localized buried layer and serving as a connection to the base of the vertical PNP transistor.
申请公布号 US5190884(A) 申请公布日期 1993.03.02
申请号 US19920852775 申请日期 1992.03.17
申请人 EXAR CORPORATION 发明人 GIANNELLA, GIOVANNI P.
分类号 H01L29/732 主分类号 H01L29/732
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