发明名称
摘要 <p>PURPOSE:To preclude variation in regeneration timing by discarding packets and storing their quantity when a buffer for delay difference absorption provided on a reception side overflows, and writing dummy packets corresponding to the discarded packets when the buffer has a vacancy. CONSTITUTION:When the delay difference absorption buffer memory 14 is full and packets 3 can not be stored, a reception control circuit 12 discards the packets 3 and the overflow packet counter 15 counts up by one. Then when packets in the delay difference absorption buffer memory 14 are read out to an output terminal 16 and a vacancy is made, a buffer memory control circuit 13 instructs a dummy packet generating circuit 17 to write one dummy packet 3' in the delay difference absorption buffer memory 14 and the counter 16 counts down by one. Similarly, the control is carried on. Therefore, packets 1, 2, 3', 4, 5, and 8 from the delay difference absorption buffer memory 14 are generated and the regeneration timing does not varies.</p>
申请公布号 JPH0514457(B2) 申请公布日期 1993.02.25
申请号 JP19870333372 申请日期 1987.12.29
申请人 NIPPON ELECTRIC CO 发明人 TAKEUCHI TAKAO
分类号 H04Q11/04 主分类号 H04Q11/04
代理机构 代理人
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