发明名称 Buffer memory and method of managing the same.
摘要 <p>A buffer memory (14) having addressable locations into which data blocks received from one of two or more devices (10, 12) are written and from which those data blocks are read to one of the other devices, is managed by a buffer memory controller (16). Selected, not necessarily sequential, buffer addresses are assigned by the controller to store data blocks included in a series supplied from the first device, and these assigned buffer addresses are loaded into register locations of a list register (22). Buffer addresses are read from an ordered list of those register locations and respective data blocks are written into such addresses. Register locations from that list are accessed to retrieve buffer addresses therefrom, and the data blocks stored in the retrieved buffer addresses are read from the buffer memory to the second device. &lt;IMAGE&gt;</p>
申请公布号 EP0528273(A2) 申请公布日期 1993.02.24
申请号 EP19920113337 申请日期 1992.08.05
申请人 FUJITSU LIMITED 发明人 SAMANTA, MANOJ K.;FELDMAN, TIMOTHY R.;FERNALLD, CLIFFORD S., JR.
分类号 G06F3/06;G06F12/08;G06F13/12;(IPC1-7):G06F3/06 主分类号 G06F3/06
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