| 摘要 |
In an integrated semiconductor memory device, apparatus (10, 20, 30) for setting a stress test mode without applying a stress voltage from the exterior comprises a comparator (10) for comparing (11, 13) an internal supply voltage IVcc, and an external supply voltage XVcc, a trigger circuit (20), and a bias circuit (30) for setting the output of the trigger to a given level. A stress mode can be set by raising the external supply voltage XVcc to a voltage over the stress voltage. The output from the comparator (10) then triggers (20) the bias circuit (30) to raise the internal voltage supply IVcc', to a stress mode. <IMAGE> |
